Rajeshwari Shinde | 8 May 12:11 2012

[PATCH 3/6 V3] USB: EXYNOS: Set USB 2.0 HOST Link mode

This patch adds a function to set usb host mode to USB 2.0 HOST Link
for EXYNOS5

Signed-off-by: Rajeshwari Shinde <rajeshwari.s <at> samsung.com>
---
Changes for v2:
	- Setting SYSREG registers was moved to System.c
	- This setting of SYSREG registers was moved to seperate patch
Changes for v3:
	- Placed setting usbhost function to top of set_system_display
	- Renamed enable_usbhost_mode and exynos5_enable_usbhost_mode to
	set_usbhost_mode and exynos5_set_usbhost_mode.
This patch is based on:
USB: EXYNOS: Add ehci support.patch	
 arch/arm/cpu/armv7/exynos/system.c        |   22 ++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/system.h |    3 +++
 drivers/usb/host/ehci-exynos.c            |    3 +++
 3 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c
index 6c34730..cc6ee03 100644
--- a/arch/arm/cpu/armv7/exynos/system.c
+++ b/arch/arm/cpu/armv7/exynos/system.c
 <at>  <at>  -25,6 +25,28  <at>  <at> 
 #include <asm/io.h>
 #include <asm/arch/system.h>

+static void exynos5_set_usbhost_mode(unsigned int mode)
+{
+	struct exynos5_sysreg *sysreg =
+		(struct exynos5_sysreg *)samsung_get_base_sysreg();
+	unsigned int phy_cfg;
+
+	/* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */
+	if (mode == USB20_PHY_CFG_HOST_LINK_EN) {
+		setbits_le32(&sysreg->usb20phy_cfg,
+				USB20_PHY_CFG_HOST_LINK_EN);
+	} else {
+		clrbits_le32(&sysreg->usb20phy_cfg,
+				USB20_PHY_CFG_HOST_LINK_EN);
+	}
+}
+
+void set_usbhost_mode(unsigned int mode)
+{
+	if (cpu_is_exynos5())
+		exynos5_set_usbhost_mode(mode);
+}
+
 static void exynos4_set_system_display(void)
 {
 	struct exynos4_sysreg *sysreg =
diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h
index c1d880f..42e1d21 100644
--- a/arch/arm/include/asm/arch-exynos/system.h
+++ b/arch/arm/include/asm/arch-exynos/system.h
 <at>  <at>  -49,6 +49,9  <at>  <at>  struct exynos5_sysreg {
 };
 #endif

+#define USB20_PHY_CFG_HOST_LINK_EN	(1 << 0)
+
+void set_usbhost_mode(unsigned int mode);
 void set_system_display_ctrl(void);

 #endif	/* _EXYNOS4_SYSTEM_H */
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 3830c43..90d66d3 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
 <at>  <at>  -24,12 +24,15  <at>  <at> 
 #include <usb.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/ehci.h>
+#include <asm/arch/system.h>
 #include "ehci.h"
 #include "ehci-core.h"

 /* Setup the EHCI host controller. */
 static void setup_usb_phy(struct exynos_usb_phy *usb)
 {
+	set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
+
 	clrbits_le32(&usb->usbphyctrl0,
 			HOST_CTRL0_FSEL_MASK |
 			HOST_CTRL0_COMMONON_N |
--

-- 
1.7.4.4

Gmane