Re: Porting blob on trizeps 2
Guennadi Liakhovetski <gl <at> dsa-ac.de>
2004-03-01 13:03:01 GMT
On Mon, 1 Mar 2004, Abraham van der Merwe wrote:
> Could you please resend. I seem to have lost those patches.
Attached below. An updated version. Also contains a 16bit AMD flash
driver, and a PXA-reboot code and some optimisations from Peter Lueg (pl
AT dsa-ac.de). It might not compile or even apply directly to the current
blob's CVS. If you want me to bring it to such a condition, let me know,
but I'll need more time, obviously. Otherwise, you should be able to
trivially fix it yourself
Regards
Guennadi
---------------------------------
Guennadi Liakhovetski, Ph.D.
DSA Daten- und Systemtechnik GmbH
Pascalstr. 28
D-52076 Aachen
Germany
diff -urN --exclude=CVS vanilla/blob/configure.in blob-cvs.clean/configure.in
--- vanilla/blob/configure.in Fri Aug 29 16:17:30 2003
+++ blob-cvs.clean/configure.in Thu Feb 19 10:03:04 2004
<at> <at> -96,6 +96,7 <at> <at>
dnl Check board we want to build for
AC_ARG_WITH(board, [ --with-board=NAME Name of the target board
shannon TuxScreen (Shannon)
system3 Prueftechnik Digital Board
trizeps Keith & Koep Trizeps Board
+ trizeps2 Keith & Koep Trizeps2 Board
Default board is lart],
board_name="$withval",
board_name="lart")
<at> <at> -369,6 +370,16 <at> <at>
use_cpu="sa1110"
use_lcd="no"
;;
+ trizeps2)
+ board_name="Keith & Koep Trizeps-II Board"
+ AC_DEFINE(TRIZEPS2,1,[Keith & Koep Trizeps-II Board])
+ BLOB_PLATFORM_OBJS="trizeps2.o"
+ AC_MSG_WARN([Warning: untested platform!])
+ BLOB_FLASH_OBJS="intel16.o"
+ DIAG_PLATFORM_OBJS="trizeps2.o"
+ use_cpu="pxa250"
+ use_lcd="no"
+ ;;
csir_ims)
board_name="CSIR Incident Management System"
AC_DEFINE(CSIR_IMS,1,[CSIR Incident Management System])
diff -urN --exclude=CVS vanilla/blob/include/blob/arch/trizeps2.h blob-cvs.clean/include/blob/arch/trizeps2.h
--- vanilla/blob/include/blob/arch/trizeps2.h Thu Jan 1 01:00:00 1970
+++ blob-cvs.clean/include/blob/arch/trizeps2.h Thu Feb 19 09:43:23 2004
<at> <at> -0,0 +1,356 <at> <at>
+/*
+ * trizeps2.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Copyright (C) 2004 Peter Lueg, DSA GmbH (pl <at> dsa-ac.de)
+ * Copyright (C) 2004 Guennadi Liakhovetski, DSA GmbH (gl <at> dsa-ac.de)
+ * based on linux/include/asm-arm/arch-pxa/trizeps2.h by Luc De Cock, Teradyne DS, Ltd.
+ *
+ * 2002-10-10: Initial code started from idp.h
+ */
+
+
+/*
+ * Note: this file must be safe to include in assembly files
+ */
+
+#ifndef BLOB_ARCH_TROZEPS2_H
+#define BLOB_ARCH_TROZEPS2_H
+
+#undef MEMORY_END
+#define MEMORY_END 0xa8000000
+
+#define USE_SERIAL1
+#define TERMINAL_SPEED baud_38400
+
+/* the base address were BLOB is loaded by the first stage loader */
+#define BLOB_ABS_BASE_ADDR (0xa0200400)
+
+/* where do various parts live in RAM */
+#define BOOT_PARAMS (0xa0000100)
+#define BLOB_RAM_BASE (0xa0100000)
+#define PARAM_RAM_BASE (0xa0200000)
+#define KERNEL_RAM_BASE (0xa0800000)
+#define RAMDISK_RAM_BASE (0xa1000000)
+
+/* and where do they live in flash */
+#define BLOB_FLASH_BASE 0x00000000
+#define BLOB_FLASH_LEN (128 * 1024)
+#define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN)
+#define PARAM_FLASH_LEN (128 * 1024)
+#define KERNEL_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN)
+#define KERNEL_FLASH_LEN ((1024 + 512) * 1024)
+#define RAMDISK_FLASH_BASE (KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
+#define RAMDISK_FLASH_LEN (1024 * 1024 * 16 - BLOB_FLASH_LEN \
+ - PARAM_FLASH_LEN \
+ - KERNEL_FLASH_LEN)
+
+/* this needs to be defined if you want parameter block support */
+#define PARAM_START PARAM_FLASH_BASE
+#define PARAM_LEN PARAM_FLASH_LEN
+
+/* load ramdisk into ram */
+#define LOAD_RAMDISK 0
+
+/* the size (in kbytes) to which the compressed ramdisk expands */
+#define RAMDISK_SIZE (4 * 1024)
+
+/* comment out following if you have a board with 32MB RAM */
+//#define PXA_TRIZEPS2_64MB 1
+#undef PXA_TRIZEPS2_64MB
+
+#define TRIZEPS2_FLASH_PHYS (PXA_CS0_PHYS)
+#define TRIZEPS2_ALT_FLASH_PHYS (PXA_CS1_PHYS)
+#define TRIZEPS2_MEDIAQ_PHYS (PXA_CS3_PHYS)
+#define TRIZEPS2_IDE_PHYS (PXA_CS5_PHYS + 0x03000000)
+#define TRIZEPS2_ETH_PHYS (0x0C800000)
+#define TRIZEPS2_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000)
+#define TRIZEPS2_BCR_PHYS (0x0E000000)
+#define TRIZEPS2_CPLD_PHYS (0x0C000000)
+
+/*
+ * virtual memory map
+ */
+
+#define TRIZEPS2_IDE_BASE (0xf0000000)
+#define TRIZEPS2_IDE_SIZE (1*1024*1024)
+
+#define TRIZEPS2_ETH_BASE (0xf1000000)
+#define TRIZEPS2_ETH_SIZE (1*1024*1024)
+#define ETH_BASE TRIZEPS2_ETH_BASE //smc9194 driver compatibility issue
+
+#define TRIZEPS2_COREVOLT_BASE (TRIZEPS2_ETH_BASE + TRIZEPS2_ETH_SIZE)
+#define TRIZEPS2_COREVOLT_SIZE (1*1024*1024)
+
+#define TRIZEPS2_BCR_BASE (0xf0000000)
+#define TRIZEPS2_BCR_SIZE (1*1024*1024)
+
+#define BCR_P2V(x) ((x) - TRIZEPS2_BCR_PHYS + TRIZEPS2_BCR_BASE)
+#define BCR_V2P(x) ((x) - TRIZEPS2_BCR_BASE + TRIZEPS2_BCR_PHYS)
+
+#ifndef __ASSEMBLY__
+# define __BCR_REG(x) (*((volatile unsigned short *)BCR_P2V(x)))
+#else
+# define __BCR_REG(x) BCR_P2V(x)
+#endif
+
+/* board level registers */
+#define TRIZEPS2_CPLD_BASE (0xf0100000)
+#define CPLD_P2V(x) ((x) - TRIZEPS2_CPLD_PHYS + TRIZEPS2_CPLD_BASE)
+#define CPLD_V2P(x) ((x) - TRIZEPS2_CPLD_BASE + TRIZEPS2_CPLD_PHYS)
+
+#ifndef __ASSEMBLY__
+# define __CPLD_REG(x) (*((volatile unsigned short *)CPLD_P2V(x)))
+#else
+# define __CPLD_REG(x) CPLD_P2V(x)
+#endif
+
+#define _TRIZEPS2_PCCARD_STATUS (0x0c000000)
+#define TRIZEPS2_PCCARD_STATUS __CPLD_REG(_TRIZEPS2_PCCARD_STATUS)
+
+/*
+ * CS memory timing via Static Memory Control Register (MSC0-2)
+ */
+
+#define MSC_CS(cs,val) ((val)<<((cs&1)<<4))
+
+#define MSC_RBUFF_SHIFT 15
+//#define MSC_RBUFF(x) ((x)<<MSC_RBUFF_SHIFT)
+#define MSC_RBUFF_SLOW MSC_RBUFF(0)
+#define MSC_RBUFF_FAST MSC_RBUFF(1)
+
+#define MSC_RRR_SHIFT 12
+//#define MSC_RRR(x) ((x)<<MSC_RRR_SHIFT)
+
+#define MSC_RDN_SHIFT 8
+//#define MSC_RDN(x) ((x)<<MSC_RDN_SHIFT)
+
+#define MSC_RDF_SHIFT 4
+//#define MSC_RDF(x) ((x)<<MSC_RDF_SHIFT)
+
+#define MSC_RBW_SHIFT 3
+//#define MSC_RBW(x) ((x)<<MSC_RBW_SHIFT)
+//#define MSC_RBW_16 MSC_RBW(1)
+//#define MSC_RBW_32 MSC_RBW(0)
+
+#define MSC_RT_SHIFT 0
+//#define MSC_RT(x) ((x)<<MSC_RT_SHIFT)
+
+
+/*
+ * Bit masks for various registers
+ */
+// TRIZEPS2_BCR_PCCARD_PWR
+#define PCC_3V (1 << 0)
+#define PCC_5V (1 << 1)
+#define PCC_EN1 (1 << 2)
+#define PCC_EN0 (1 << 3)
+
+// TRIZEPS2_BCR_PCCARD_EN
+#define PCC_RESET (1 << 6)
+#define PCC_ENABLE (1 << 0)
+
+// TRIZEPS2_BSR_PCCARDx_STATUS
+#define _PCC_WRPROT (1 << 7) // 7-4 read as low true
+#define _PCC_RESET (1 << 6)
+#define _PCC_IRQ (1 << 5)
+#define _PCC_INPACK (1 << 4)
+#define PCC_BVD1 (1 << 0)
+#define PCC_BVD2 (1 << 1)
+#define PCC_VS1 (1 << 2)
+#define PCC_VS2 (1 << 3)
+
+// TRIZEPS2_BCR_CONTROL bits
+#define BCR_LCD_ON (1 << 4)
+#define BCR_LCD_OFF (0)
+#define BCR_LCD_MASK (1 << 4)
+#define BCR_PCMCIA_RESET (1 << 7)
+#define BCR_PCMCIA_NORMAL (0)
+
+#define PCC_DETECT (GPLR(24) & GPIO_bit(24))
+#define PCC_READY (GPLR(1) & GPIO_bit(1))
+
+// Board Control Register
+#define _TRIZEPS2_BCR_CONTROL (TRIZEPS2_BCR_PHYS)
+#define TRIZEPS2_BCR_CONTROL __BCR_REG(_TRIZEPS2_BCR_CONTROL)
+
+// Board TTL-IO register
+#define TRIZEPS2_TTLIO_PHYS (0x0d800000)
+#define TRIZEPS2_TTLIO_BASE (0xf2000000)
+// various ioctl cmds
+#define TTLIO_RESET 0
+#define TTLIO_GET 1
+#define TTLIO_SET 2
+#define TTLIO_UNSET 3
+
+/*
+ * Macros for LCD Driver
+ */
+
+#ifdef CONFIG_FB_PXA
+
+#define FB_BACKLIGHT_ON()
+#define FB_BACKLIGHT_OFF()
+
+#define FB_PWR_ON()
+#define FB_PWR_OFF()
+
+#define FB_VLCD_ON() WRITE_TRIZEPS2_BCR(BCR_LCD_ON,BCR_LCD_MASK);
+#define FB_VLCD_OFF() WRITE_TRIZEPS2_BCR(BCR_LCD_OFF,BCR_LCD_MASK);
+
+#endif
+
+/* A listing of interrupts used by external hardware devices */
+
+#define GPIO_TOUCH_PANEL_IRQ 2
+#define TOUCH_PANEL_IRQ IRQ_GPIO(GPIO_TOUCH_PANEL_IRQ)
+#define GPIO_ETHERNET_IRQ 19
+#define ETHERNET_IRQ IRQ_GPIO(GPIO_ETHERNET_IRQ)
+#define GPIO_TTLIO_IRQ 23
+#define TTLIO_IRQ IRQ_GPIO(GPIO_TTLIO_IRQ)
+
+#define TOUCH_PANEL_IRQ_EDGE GPIO_FALLING_EDGE
+#define IDE_IRQ_EDGE GPIO_RISING_EDGE
+#define ETHERNET_IRQ_EDGE GPIO_RISING_EDGE
+
+#define PCMCIA_S_CD_VALID IRQ_GPIO(24)
+#define PCMCIA_S_CD_VALID_EDGE GPIO_BOTH_EDGES
+
+#define PCMCIA_S_RDYINT IRQ_GPIO(1)
+#define PCMCIA_S_RDYINT_EDGE GPIO_FALLING_EDGE
+
+/*
+ * macros for MTD driver
+ */
+
+#define FLASH_WRITE_PROTECT_DISABLE() // ((TRIZEPS2_CPLD_FLASH_WE) &= ~(0x1))
+#define FLASH_WRITE_PROTECT_ENABLE() // ((TRIZEPS2_CPLD_FLASH_WE) |= (0x1))
+
+/* shadow registers for write only registers */
+#ifndef __ASSEMBLY__
+extern unsigned short trizeps2_bcr_shadow;
+#endif
+
+/*
+ * macros to write to write only register
+ *
+ * none of these macros are protected from
+ * multiple drivers using them in interrupt context.
+ */
+
+#define WRITE_TRIZEPS2_BCR(value, mask) \
+{\
+ trizeps2_bcr_shadow = ((value & mask) | (trizeps2_bcr_shadow & ~mask));\
+ TRIZEPS2_BCR_CONTROL = trizeps2_bcr_shadow;\
+}
+
+/* Read from Keit bootloader */
+#define MSC0_VALUE 0x2bd02bd8
+#define MSC1_VALUE 0x1ce82438
+#define MSC2_VALUE 0x1ce836d4
+
+#define MDREFR_VALUE 0x0009c018
+#define MDCNFG_VALUE 0x1ac81ac9
+#define MDMRS_VALUE 0x00320032
+
+
+#define MECR_VALUE 0x00000001
+#define MCIO0_VALUE 0x00008407
+#define MCIO1_VALUE 0x0000c108
+#define MCMEM0_VALUE 0x00004204
+#define MCMEM1_VALUE 0x00010204
+#define MCATT0_VALUE 0x00010504
+#define MCATT1_VALUE 0x00010504
+#define SXCNFG_VALUE 0x00040004
+
+/* GPIO configuration */
+#define GPIO0_VALUE GPIO_INPUT
+#define GPIO1_VALUE GPIO_INPUT
+#define GPIO2_VALUE GPIO_INPUT
+#define GPIO3_VALUE GPIO_INPUT /* eth_wakeup */
+#define GPIO4_VALUE GPIO_INPUT /* bank_switch_int */
+#define GPIO5_VALUE GPIO_INPUT /* eth_link_status */
+#define GPIO6_VALUE GPIO_INPUT
+#define GPIO7_VALUE GPIO_INPUT /* cpld_clk */
+#define GPIO8_VALUE GPIO_INPUT
+#define GPIO9_VALUE GPIO_INPUT /* eth_int */
+#define GPIO10_VALUE GPIO_INPUT /* eth_reset */
+#define GPIO11_VALUE GPIO_INPUT
+#define GPIO12_VALUE GPIO_INPUT /* watchdog_strobe */
+#define GPIO13_VALUE GPIO_INPUT /* cpld_hw_reset */
+#define GPIO14_VALUE GPIO_INPUT /* cpld_?? */
+#define GPIO15_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2) /* nCS1 [img_buffer] */
+#define GPIO16_VALUE GPIO_INPUT
+#define GPIO17_VALUE GPIO_INPUT /* cpld_?? */
+#define GPIO18_VALUE GPIO_INPUT /* vlio_ready_signal */
+#define GPIO19_VALUE GPIO_INPUT
+#define GPIO20_VALUE GPIO_INPUT
+#define GPIO21_VALUE GPIO_INPUT
+#define GPIO22_VALUE GPIO_INPUT
+#define GPIO23_VALUE GPIO_INPUT
+#define GPIO24_VALUE GPIO_INPUT
+#define GPIO25_VALUE GPIO_INPUT /* LED [debug] */
+#define GPIO26_VALUE GPIO_INPUT
+#define GPIO27_VALUE GPIO_INPUT
+#define GPIO28_VALUE GPIO_INPUT
+#define GPIO29_VALUE GPIO_INPUT
+#define GPIO30_VALUE GPIO_INPUT
+#define GPIO31_VALUE GPIO_INPUT
+#define GPIO32_VALUE GPIO_INPUT
+#define GPIO33_VALUE GPIO_OUT_HI /* nCS5 [unused] */
+#define GPIO34_VALUE (GPIO_INPUT | GPIO_ALT_FN1) /* FFRXD */
+#define GPIO35_VALUE GPIO_INPUT
+#define GPIO36_VALUE GPIO_INPUT
+#define GPIO37_VALUE GPIO_INPUT
+#define GPIO38_VALUE GPIO_INPUT
+#define GPIO39_VALUE (GPIO_OUT_LO | GPIO_ALT_FN2) /* FFTXD */
+#define GPIO40_VALUE GPIO_INPUT
+#define GPIO41_VALUE GPIO_INPUT
+#define GPIO42_VALUE GPIO_INPUT
+#define GPIO43_VALUE GPIO_INPUT
+#define GPIO44_VALUE GPIO_INPUT
+#define GPIO45_VALUE GPIO_INPUT
+#define GPIO46_VALUE GPIO_INPUT
+#define GPIO47_VALUE GPIO_INPUT
+#define GPIO48_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO49_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2) /* cpld_pcmcia_pwe */
+#define GPIO50_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO51_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO52_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO53_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO54_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO55_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2)
+#define GPIO56_VALUE (GPIO_INPUT | GPIO_ALT_FN1)
+#define GPIO57_VALUE (GPIO_INPUT | GPIO_ALT_FN1)
+#define GPIO58_VALUE GPIO_INPUT
+#define GPIO59_VALUE GPIO_INPUT
+#define GPIO60_VALUE GPIO_INPUT
+#define GPIO61_VALUE GPIO_INPUT
+#define GPIO62_VALUE GPIO_INPUT
+#define GPIO63_VALUE GPIO_INPUT
+#define GPIO64_VALUE GPIO_INPUT
+#define GPIO65_VALUE GPIO_INPUT
+#define GPIO66_VALUE GPIO_INPUT
+#define GPIO67_VALUE GPIO_INPUT
+#define GPIO68_VALUE GPIO_INPUT
+#define GPIO69_VALUE GPIO_INPUT
+#define GPIO70_VALUE GPIO_INPUT
+#define GPIO71_VALUE GPIO_INPUT
+#define GPIO72_VALUE GPIO_INPUT
+#define GPIO73_VALUE GPIO_INPUT
+#define GPIO74_VALUE GPIO_INPUT
+#define GPIO75_VALUE GPIO_INPUT
+#define GPIO76_VALUE GPIO_INPUT
+#define GPIO77_VALUE GPIO_INPUT
+#define GPIO78_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2) /* nCS2 [img_buffer] */
+#define GPIO79_VALUE (GPIO_OUT_HI | GPIO_ALT_FN2) /* nCS3 [eth] */
+#define GPIO80_VALUE GPIO_OUT_HI /* nCS4 [unused] */
+#define GPIO81_VALUE GPIO_INPUT
+#define GPIO82_VALUE GPIO_INPUT
+#define GPIO83_VALUE GPIO_INPUT
+#define GPIO84_VALUE GPIO_INPUT
+
+#endif
diff -urN --exclude=CVS vanilla/blob/include/blob/arch.h blob-cvs.clean/include/blob/arch.h
--- vanilla/blob/include/blob/arch.h Fri Aug 29 16:17:39 2003
+++ blob-cvs.clean/include/blob/arch.h Thu Feb 19 10:03:04 2004
<at> <at> -27,7 +27,7 <at> <at>
#define BLOB_ARCH_H
/* processor specific include files */
-#if defined(PXA_IDP) || defined(CSIR_IMS) || defined(RAMSES)
+#if defined(PXA_IDP) || defined(CSIR_IMS) || defined(RAMSES) || defined(TRIZEPS2)
#include <blob/proc/pxa.h>
#else
#include <blob/proc/sa1100.h>
<at> <at> -76,6 +76,8 <at> <at>
# include <blob/arch/dafit.h>
#elif defined TRIZEPS
# include <blob/arch/trizeps.h>
+#elif defined TRIZEPS2
+# include <blob/arch/trizeps2.h>
#elif defined PXA_IDP
# include <blob/arch/pxa_idp.h>
#elif defined CSIR_IMS
diff -urN --exclude=CVS vanilla/blob/include/blob/flash.h blob-cvs.clean/include/blob/flash.h
--- vanilla/blob/include/blob/flash.h Thu Jul 31 12:50:29 2003
+++ blob-cvs.clean/include/blob/flash.h Thu Feb 19 10:03:04 2004
<at> <at> -72,6 +72,7 <at> <at>
} flash_driver_t;
/* implemented flash drivers */
+extern flash_driver_t amd16_flash_driver;
extern flash_driver_t amd32_flash_driver;
extern flash_driver_t intel16_flash_driver;
extern flash_driver_t intel32_flash_driver;
diff -urN --exclude=CVS vanilla/blob/include/blob/linux.h blob-cvs.clean/include/blob/linux.h
--- vanilla/blob/include/blob/linux.h Fri Aug 29 16:17:45 2003
+++ blob-cvs.clean/include/blob/linux.h Thu Feb 19 10:03:04 2004
<at> <at> -76,6 +76,8 <at> <at>
# define ARCH_NUMBER (112)
#elif defined TRIZEPS
# define ARCH_NUMBER (74)
+#elif defined TRIZEPS2
+# define ARCH_NUMBER (282)
#elif defined CSIR_IMS
# define ARCH_NUMBER (358)
#else
diff -urN --exclude=CVS vanilla/blob/src/blob/Makefile.am blob-cvs.clean/src/blob/Makefile.am
--- vanilla/blob/src/blob/Makefile.am Fri Aug 29 16:18:15 2003
+++ blob-cvs.clean/src/blob/Makefile.am Thu Feb 19 10:03:04 2004
<at> <at> -79,7 +79,7 <at> <at>
EXTRA_blob_rest_elf32_SOURCES = \
chkmem.c \
clock.c \
- amd32.c intel16.c intel32.c nullflash.c \
+ amd16.c amd32.c intel16.c intel32.c nullflash.c \
cramfs.c \
compr_rtime.c compr_rubin.c jffs2.c \
uucodec.c \
<at> <at> -87,7 +87,7 <at> <at>
smc9196.c \
accelent_sa.c assabet.c brutus.c badge4.c cep.c clart.c dafit.c frodo.c \
hackkit.c h3600.c idr.c jornada720.c lart.c miniprint.c nesa.c pleb.c \
- ramses.c shannon.c system3.c trizeps.c pxa_idp.c csir_ims.c
+ ramses.c shannon.c system3.c trizeps.c trizeps2.c pxa_idp.c csir_ims.c
blob_rest_elf32_DEPENDENCIES = \
diff -urN --exclude=CVS vanilla/blob/src/blob/amd16.c blob-cvs.clean/src/blob/amd16.c
--- vanilla/blob/src/blob/amd16.c Thu Jan 1 01:00:00 1970
+++ blob-cvs.clean/src/blob/amd16.c Thu Feb 19 11:21:29 2004
<at> <at> -0,0 +1,207 <at> <at>
+/*
+ * amd16.c: AMD 16 bit flash driver
+ *
+ * Copyright (C) 2004 Guennadi Liakhovetski, DSA GmbH (gl <at> dsa-ac.de)
+ * based on amd32.c by Erik Mouw (J.A.K.Mouw <at> its.tudelft.nl) and Russ Dill (Russ.Dill <at> asu.edu)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21358.pdf
+ *
+ */
+
+#ident "$Id: amd16.c,v 1.1 2004/02/19 10:21:29 gl Exp $"
+
+#ifdef HAVE_CONFIG_H
+# include <blob/config.h>
+#endif
+
+#include <blob/errno.h>
+#include <blob/flash.h>
+#include <blob/util.h>
+#include <blob/serial.h>
+
+
+/* flash commands for 16 bit AMD flash chip */
+#define READ_ARRAY 0x000000F0
+#define UNLOCK1 0x000000AA
+#define UNLOCK2 0x00000055
+#define CONFIG_QUERY 0x00000090
+#define EXIT_UNLOCK1 0x00000090
+#define EXIT_UNLOCK2 0x00000000
+#define ERASE_SETUP 0x00000080
+#define ERASE_CONFIRM 0x00000030
+#define PGM_SETUP 0x000000A0
+#define UNLOCK_BYPASS 0x00000020
+#define FLASH_ADDR1 (0x00000555 << 1)
+#define FLASH_ADDR2 (0x000002AA << 1)
+#define ERASE_DONE 0x00000080
+#define TOGGLE_BIT 0x00000040
+#define RDY_MASK 0x00000080
+#define STATUS_PGM_ERR 0x00000020
+#define STATUS_ERASE_ERR 0x00000001
+
+static void flash_read_array_amd16(void)
+{
+ *(u16 *)FLASH_ADDR1 = data_to_flash(READ_ARRAY);
+ barrier();
+}
+
+static int flash_erasing_amd16(u16 *addr)
+{
+ int i;
+ u16 val0, val1;
+
+ /* Wait for erase-start */
+ for (i=0; i<10000; i++)
+ if (data_from_flash(*addr) & 0x8)
+ break;
+
+ val0 = data_from_flash(*addr) & 0x40;
+ if (i >= 10000) {
+ printf("amd16: timeout starting the erase\n");
+ return -1;
+ }
+
+ for (i=0; i<1000000000; i++) {
+ val1 = data_from_flash(*addr) & 0x40;
+ if (val0 == val1)
+ return 0;
+ val0 = val1;
+ }
+ printf("amd16: timeout waiting for erase to finish\n");
+ return -1;
+}
+
+static int flash_writing_amd16(u16 *addr)
+{
+ int i;
+
+ for (i=0; i<1000; i++)
+ if ((data_from_flash(*addr) & 0x40) == (data_from_flash(*addr) & 0x40))
+ return 0;
+ return -1;
+}
+
+static int flash_erase_amd16(u32 *addr)
+{
+ /* prepare for erase */
+ *(u16 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
+ barrier();
+ *(u16 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
+ barrier();
+ *(u16 *)FLASH_ADDR1 = data_to_flash(ERASE_SETUP);
+ barrier();
+
+ /* erase command */
+ *(u16 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
+ barrier();
+ *(u16 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
+ barrier();
+ *(u16*)addr = data_to_flash(ERASE_CONFIRM);
+
+ /* I just can't find clean ways of dealing with this flash...
+ * The error bit is a *set* bit, so if its read, and bit 7 is 0,
+ * but bit 5 is 1, its an error, however, after these status reads
+ * are done, erased flash goes to 0xff...sooo...each chip has to
+ * be caught where the bits are the status bits -- Russ */
+
+ /* Russ, why don't you do this like the LART does? Just check
+ * the status of chips with a single compare. -- Erik */
+
+ /* Maybe this restructuring will make it more clear, when the flash
+ * is done erasing, it will return 0xFFFF on read, which contains the
+ * status pgm err bit. So an error condition occurs if the status pgm
+ * bit is set, but the erase done bit is not. OK, switch this over
+ * to detecting bit toggles. --Russ */
+
+ if (flash_erasing_amd16((u16*)addr) < 0) {
+ /* put flash back into Read Array mode */
+ printf("amd16: erase block at %p: error, ", addr);
+ flash_read_array_amd16();
+ printf("got back to read-array\n");
+ return -EFLASHERASE;
+ }
+
+ return 0;
+}
+
+static int flash_write16(u16 *dst, const u16* src)
+{
+ *(u16 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
+ barrier();
+ *(u16 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
+ barrier();
+ *(u16 *)FLASH_ADDR1 = data_to_flash(PGM_SETUP);
+ barrier();
+
+ *dst = *src;
+ barrier();
+
+ if (flash_writing_amd16(dst) < 0 || *dst != *src) {
+ barrier();
+ flash_read_array_amd16();
+ return -EFLASHPGM;
+ }
+
+ return 0;
+}
+
+static int flash_write_amd16(u32 *dst, const u32 *src)
+{
+ int ret;
+
+ if (!(ret = flash_write16((u16*)dst, (const u16*)src)))
+ return flash_write16((u16*)dst + 1, (const u16*)src + 1);
+
+ return ret;
+}
+
+static int flash_lock_block_amd16(u32 *blockStart)
+{
+ /* FIXME: this function should be fleshed out -- Erik */
+ return 0;
+}
+
+static int flash_unlock_block_amd16(u32 *blockStart)
+{
+ /* FIXME: this function should be fleshed out -- Erik */
+ return 0;
+}
+
+static int flash_query_block_lock_amd16(u32 *blockStart)
+{
+ int result;
+ *(u16 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
+ barrier();
+ *(u16 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
+ barrier();
+ *(u16 *)FLASH_ADDR1 = data_to_flash(CONFIG_QUERY);
+ barrier();
+
+ result = *(u16 *)(blockStart + 2);
+ flash_read_array_amd16();
+ return !!result;
+
+}
+
+/* flash driver structure */
+flash_driver_t amd16_flash_driver = {
+ erase: flash_erase_amd16,
+ write: flash_write_amd16,
+ lock_block: flash_lock_block_amd16,
+ unlock_block: flash_unlock_block_amd16,
+ query_block_lock: flash_query_block_lock_amd16
+};
diff -urN --exclude=CVS vanilla/blob/src/blob/memsetup-pxa.S blob-cvs.clean/src/blob/memsetup-pxa.S
--- vanilla/blob/src/blob/memsetup-pxa.S Thu Aug 7 21:46:54 2003
+++ blob-cvs.clean/src/blob/memsetup-pxa.S Fri Feb 20 15:21:31 2004
<at> <at> -164,8 +164,13 <at> <at>
/* set K1RUN if bank 0 installed */
orr r4, r4, #0x00010000
+#if defined(TRIZEPS2)
+ /* set K1DB2 (SDClk[1] = MemClk) */
+ bic r4, r4, #0x00020000
+#else
/* set K1DB2 (SDClk[1] = MemClk/2) */
orreq r4, r4, #0x00020000
+#endif
/* write back MDREFR */
str r4, [r1, #MDREFR_OFFSET]
<at> <at> -229,5 +234,37 <at> <at>
ldr r2, =MDMRS_VALUE
str r2, [r1, #MDMRS_OFFSET]
+ <at> EXPERIMENTAL!!! Switch to 400MHz... (shamelessly borrowed from the kernel)
+
+ mov r4, #0x41000000 <at> CCCR
+ orr r4, r4, #0x300000
+ mov r2, #0x160 <at> mem= 99, run=398, turbo=398, PXbus= 199
+// mov r2, #0x140 <at> mem= 99, run=199, turbo=199, PXbus= 99
+ orr r2, r2, #0x1
+ str r2, [r4]
+
+ //ldr r4, [r1, #MDREFR_OFFSET] <at> load MDREFR
+ b 2f
+ .align 5
+1:
+// mov r2, #0x3 <at> CCLKCFG_TURBO|CCLKCFG_FCS
+ mov r2, #0x2 <at> !CCLKCFG_TURBO|CCLKCFG_FCS
+ mcr p14, 0, r2, c6, c0, 0 <at> set CCLKCFG[FCS]
+
+ // <at> restart sdcke 0 / 1
+ //bic r5, r4, #(0x00001000 | 0x00008000) <at> MDREFR_E0PIN | MDREFR_E1PIN
+ //str r5, [r1, #MDREFR_OFFSET] <at> clear
+ //str r4, [r1, #MDREFR_OFFSET] <at> restore
+
+ <at> Generate refresh cycles for all banks
+ mov r3, #MEMORY_START
+ ldr r4, [r3]
+.rept 8
+ str r4, [r3]
+.endr
+
+ b 3f
+2: b 1b
+3:
mov pc, lr
diff -urN --exclude=CVS vanilla/blob/src/blob/trizeps2.c blob-cvs.clean/src/blob/trizeps2.c
--- vanilla/blob/src/blob/trizeps2.c Thu Jan 1 01:00:00 1970
+++ blob-cvs.clean/src/blob/trizeps2.c Thu Feb 19 09:43:23 2004
<at> <at> -0,0 +1,115 <at> <at>
+/*
+ * trizeps2.c: Keith-and-Koep Trizeps-II specific stuff
+ *
+ * Modified from src/blob/csir_ims.c
+ *
+ * Copyright (C) 2003 Guennadi Liakhovetski, DSA GmbH (gl <at> dsa-ac.de)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifdef HAVE_CONFIG_H
+# include <blob/config.h>
+#endif
+
+#include <blob/main.h>
+#include <blob/arch.h>
+#include <blob/errno.h>
+#include <blob/error.h>
+#include <blob/util.h>
+#include <blob/reboot.h>
+#include <blob/serial.h>
+#include <blob/flash.h>
+#include <blob/init.h>
+#include <blob/command.h>
+#include <blob/uucodec.h>
+#include <blob/led.h>
+#include <blob/partition.h>
+
+static void trizeps2_init_hardware(void)
+{
+ static flash_descriptor_t trizeps2_flash[] =
+ {
+ {
+ size: 1 * 128 * 1024,
+ num: 128,
+ lockable: 1
+ },
+ {
+ /* NULL block */
+ },
+ };
+ static blob_partition_t partitions[] = {
+ {
+ .magic = BLOB_DEFAULT_PART_TABLE_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = 0x00000000,
+ .size = BLOB_PART_SIZ_FULL
+ }, {
+ .magic = BLOB_PART_VALID_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = BLOB_PART_OFS_APPEND,
+ .size = BLOB_FLASH_LEN,
+ .name = "blob",
+ .mem_base = BLOB_RAM_BASE
+ }, {
+ .magic = BLOB_PART_VALID_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = BLOB_PART_OFS_APPEND,
+ .size = PARAM_FLASH_LEN,
+ .name = "param",
+ .flags = BLOB_PART_FLAG_PTABLE
+ }, {
+ .magic = BLOB_PART_VALID_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = BLOB_PART_OFS_APPEND,
+ .size = KERNEL_FLASH_LEN,
+ .name = "kernel",
+ .flags = BLOB_PART_FLAG_EXEC,
+ .mem_base = KERNEL_RAM_BASE,
+ .entry_point = KERNEL_RAM_BASE
+ }, {
+ .magic = BLOB_PART_VALID_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = BLOB_PART_OFS_APPEND,
+ .size = RAMDISK_FLASH_LEN,
+ .name = "ramdisk",
+ .flags = BLOB_PART_FLAG_LOAD,
+ .mem_base = RAMDISK_RAM_BASE
+ }, /*{
+ .magic = BLOB_PART_VALID_MAGIC,
+ .next = sizeof (blob_partition_t),
+ .offset = BLOB_PART_OFS_APPEND,
+ .size = BLOB_PART_SIZ_FULL,
+ .name = "jffs2",
+ .flags = BLOB_PART_FLAG_JFFS2
+ }, */{
+ .magic = BLOB_PART_LAST_MAGIC
+ }
+ };
+
+ flash_descriptors = trizeps2_flash;
+
+ /* select drivers */
+ reboot_driver = &pxa_reboot_driver;
+ flash_driver = &intel16_flash_driver;
+ serial_driver = &pxa_serial_driver;
+
+ default_partition_table = partitions;
+ flash_partition_table = (blob_partition_t *) 0x00000000;
+}
+
+__initlist(trizeps2_init_hardware, INIT_LEVEL_DRIVER_SELECTION);
diff -urN --exclude=CVS vanilla/blob/src/diag/Makefile.am blob-cvs.clean/src/diag/Makefile.am
--- vanilla/blob/src/diag/Makefile.am Fri Aug 29 16:19:00 2003
+++ blob-cvs.clean/src/diag/Makefile.am Thu Feb 19 10:03:04 2004
<at> <at> -72,6 +72,7 <at> <at>
shannon.c \
system3.c \
trizeps.c \
+ trizeps2.c \
pxa_idp.c \
csir_ims.c
diff -urN --exclude=CVS vanilla/blob/src/lib/reboot-pxa.c blob-cvs.clean/src/lib/reboot-pxa.c
--- vanilla/blob/src/lib/reboot-pxa.c Sat Jan 4 03:11:43 2003
+++ blob-cvs.clean/src/lib/reboot-pxa.c Thu Feb 19 09:43:23 2004
<at> <at> -26,6 +26,8 <at> <at>
#ifdef HAVE_CONFIG_H
# include <blob/config.h>
#endif
+#include <blob/arch.h>
+#include <blob/time.h>
#include <blob/util.h>
#include <blob/reboot.h>
<at> <at> -33,12 +35,15 <at> <at>
-
void pxa_reboot(void)
{
-#warning "FIXME: add real PXA reboot code here! -- Erik"
- printf("FIXME: add PXA-250 reboot code here!\n");
- printf("Going into endless loop, just use your reset button...\n");
+ printf("Invoking Watchdog Reset in 1ms ...\n");
+ serial_flush_output();
+
+ OSMR3 = OSCR + (TICKS_PER_SECOND / 1000); /* 1ms */
+ OWER = 1;
+
+ printf("Watchdog Reset failed, just use your reset button...\n");
serial_flush_output();
for(;;);
diff -urN --exclude=CVS vanilla/blob/utils/build/build_Makefile blob-cvs.clean/utils/build/build_Makefile
--- vanilla/blob/utils/build/build_Makefile Thu Aug 7 11:36:19 2003
+++ blob-cvs.clean/utils/build/build_Makefile Thu Feb 19 10:03:04 2004
<at> <at> -15,7 +15,7 <at> <at>
archs = \
accelent_sa assabet neponset badge4 brutus cep creditlart frodo \
hackkit h3600 idr jornada720 lart lubbock miniprint nesa pleb \
- pxa_idp csir_ims shannon system3 trizeps
+ pxa_idp csir_ims shannon system3 trizeps trizeps2
debug-archs = $(foreach a, $(archs), $(a)-debug)
all-archs = $(archs) $(debug-archs)
diff -urN --exclude=CVS vanilla/blob/utils/build/build_all blob-cvs.clean/utils/build/build_all
--- vanilla/blob/utils/build/build_all Fri Aug 29 16:19:45 2003
+++ blob-cvs.clean/utils/build/build_all Thu Feb 19 10:03:04 2004
<at> <at> -12,7 +12,7 <at> <at>
# published by the Free Software Foundation.
#
-archs="accelent_sa assabet neponset badge4 brutus cep creditlart frodo hackkit h3600 idr jornada720
lart lubbock miniprint nesa pleb pxa_idp csir_ims ramses shannon system3 trizeps"
+archs="accelent_sa assabet neponset badge4 brutus cep creditlart frodo hackkit h3600 idr jornada720
lart lubbock miniprint nesa pleb pxa_idp csir_ims ramses shannon system3 trizeps trizeps2"
linux_prefix=~/LART/build/linux/elinux
blob_src=~/src/sourceforge/blob
extra_flags="--enable-all-features --with-commands=all"
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