RE: ipengine boot

Hello

Thank you very much for the assistance. Just to confirm, the modified
os/mpc/l.s should look like:
------------------------
/*
 * Boot first processor
 */
	TEXT start(SB), $-4

	MOVW	MSR, R3
	RLWNM	$0, R3, $~EE, R3
	RLWNM	$0, R3, $~FPE, R3
	OR	$ME, R3
	ISYNC
	MOVW	R3, MSR	/* turn off interrupts but enable traps */
	MSRSYNC
	
|/* if executing in rom, relocate to ram */ <--is this the right spot?
|	MOVW	LR, R3
|	MOVW	$4,	R4
|	SUBCC	R4, R3
|	BGE		ram
|	MOVW	$start(SB), R4
|	BL	1(PC)    /*loads LR with the original kernel start
address */
|	MOVW	$edata+63(SB), R5
|	SUB		R4, R5, R1
|	SRAW	$6, R1
|	MOVW	R1,CTR
|	MOVW	$KZERO, R2
|	ANDN	R2, R4
|	MOVW	R4, LR
|reloc:
|	MOVMW	0(R3), R16
|	MOVMW	R16, 0(R4)
|	ADD		$64, R4
|	ADD		$64, R3
|	BDNZ	reloc
|	BR		(LR)
|ram: <--does this code get pushed down to here?
	MOVW	$0, R0 /* except during trap handling, R0 is zero from
now on */
	MOVW	R0, CR
	MOVW	$setSB(SB), R2

----------------------

Btw:
Much of the C code in os/boot/mpc tries to include libc.h, which doesn't
seem to be part of the distribution (20060303). Perhaps this was part of
older distributions.

Dylan Saunders

-----Original Message-----
From: inferno-list-admin@...
[mailto:inferno-list-admin@...] On Behalf Of Richard Miller
Sent: Monday, May 12, 2008 9:07 AM
To: inferno-list@...
Subject: Re: [inferno-list] ipengine boot

I've confirmed that the relocation code I posted yesterday works
for loading inferno from flash, with the addition of one more
instruction: immediately after label 'start(SB)', you need to insert
	BL	1(PC)
which loads LR with the original kernel start address (+4).

Sorry I overlooked that essential point.

An obvious improvement on just copying the kernel from flash
to RAM would be storing a compressed kernel image in flash
with a bit of self-decompression code at the start.  That's
left as an exercise for the reader ...