More acorn32 breakage (was Re: Issues with new i2c framework)

On Mon, 6 Oct 2003 09:12:35 -0700
Jason Thorpe <thorpej <at> wasabisystems.com> wrote:

> Ok, I have fixed the acorn32 and acorn26 problems:
> 
> 	- acorn26: I forgot to "cvs add" a file.
> 	- acorn32: I forgot to include the arch/arm/iomd directory
> 	  on my "cvs ci" command.
> 
Thanks this looks good. However I have found another couple of
problems.

Problem 1:
Syntax error in GENERIC for new ATA bus attachments.
GENERIC line 233 has:
wd*	at atabus? ? drive ?
which should be:
wd*	at atabus?  drive ?

and at line 296:
atabus*	at dtide? channel
which should be 
atabus*	at dtide? channel ?

I've attached a patch for this to this message. I have not checked if
the other kernel configs have been updated correctly.

Fixing these leads to:

Problem 2:
/usr/tools//bin/arm--netbsdelf-gcc   -ffreestanding  -O2 -march=armv3m
-mtune=strongarm -Wcomment -Werror -Wall -Wno-main
-Wno-format-zero-length -Wpointer-arith -Wmissing-prototypes
-Wstrict-prototypes -Wno-sign-compare -Wno-uninitialized  -Darm32 -I. 
-I/work/src/sys/arch -I/work/src/sys -nostdinc -DNMBCLUSTERS="0x800"
-DNBUF="0x800" -DLKM -DARM32_PMAP_NEW -DMAXUSERS=32 -D_KERNEL
-D_KERNEL_OPT   -c
/work/src/sys/arch/arm/arm32/fault.c/var/tmp//ccKPl5KD.s: Assembler
messages:/var/tmp//ccKPl5KD.s:184: Error: selected processor does not
support `ldrh r1,[r5]'

*** Failed target:  fault.o

fault.c contains an ARMV4 specific instruction ldrh. Which is not
available on ARM6/7 and even StrongARM on acorn32 due to limitations of
the CPU bus. I'm not sure what the correct fix for this is. Looking at
CVS this has been in the code since revision 1.3 of this file but the
new tools are being more strict and complaining about the problem.

Suggestions?

 Mike