Re: mostly working SMP again

Should I fire up my SS20 and give this a go? Is the SMP code checked in
to -current?

On Mon, 4 Jan 2010, Brian Buhrow wrote:

> 	hello.  If I remember correctly, stray interrupts on sparc machines
> are those where an interrupt is asserted for which no driver is
> responsible.  So, if an interrupt happens, and no driver claims it, then
> it's considered a stray.  That may be similar to what you describe, but I
> don't think it's quite the same.
> -Brian
> On Jan 4,  8:45pm, David Laight wrote:
> } Subject: Re: mostly working SMP again
> } On Mon, Jan 04, 2010 at 04:47:41PM +1100, matthew green wrote:
> } >
> } > hi folks.
> } >
> } >
> } > i've commited several changes to -current today that make SMP almost
> } > work for me.  i have to comment the stray interrupts panic and beyond
> } > that it seems to mostly work.
> }
> } What defines a 'stray interrupt' ?
> }
> } If an ISR writes to the hw control register to remove the IRQ
> } immediately before returning from the ISR it is very easy for the
> } cpu to take an interrupt before the IRQ line is deasserted.
> }
> } This can lead to none of the ISR in the ISR chain 'claiming' the
> } interrupt.  It might also mean the the IACK sequence fails to find
> } an asserted IRQ line - for sparc this might be software.
> } (the interrupt controller on i386 returns IRQ7).
> }
> } If this is likely to be the case then it isn't really an error.
> } Device drivers need to minimise the number of times this happens,
> } but the cost of a full flush of the write is only needed in the case
> } where the IRQ returns quickly (and it may need the PCI bus to be busy).
> }
> } 	David
> }
> } --
> } David Laight: david <at> l8s.co.uk
>> -- End of excerpt from David Laight
>
>

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Hisashi T Fujinaka - htodd <at> twofifty.com
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